[Cs35101] calculating PC in lw, sw and beq

[Dianne Foreback]

Dear Computer Architecture Class:

The slides for the flow of the I-Type instruction is correct in the
implementation we reviewed today.

The I-Type instructions include the lw, sw and beq.

For the lw and sw, the address to read a word from or store a word to is
calculated by adding the 16-bit sign extended offset (NOT shifted left by
two since this represents the number of words to skip) to the base
register.  Now, the branch instruction, beq, calculates the address to jump
to by using relative addressing (relative to the current PC which is
already updated by 4).  So, the way the address is calculated if the branch
is taken is add the sign extended offset that is then shifted left by 2
bits (filling these right two bits with 00) to the PC that is already
incremented by 4.

Best,
Dianne
_______________________________________________
Dr. Dianne Foreback, Assistant Professor
Department of Computer Science
Math and Computer Science Building (MSB) 266
P.O. Box 5190, Kent, Ohio 44242-0001, USA
Phone: 330.672.9064
Email: dforebac at kent.edu
_______________________________________________
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